Design of spintronic ferroelectric architectures for ultra-low power memories, post-CMOS logic and neuromorphic computing – SPINFROST

The tremendous increasing of data collection, analysis, storage and processing has raised concerns towards the optimization and rethinking of the edge-computing paradigm. Indeed, moving the data analysis and processing closer to the location where the data is collected and eventually stored, is the only way to achieve realistic, green and sustainable ICT. It is foreseen that the ITC market, which already consumes 11% of the world electricity, should be multiplied by 2030 by 2 to 5. Three key points have been identified to allow a massive reduction of the power consumption in complex systems: i) drastically reducing the power consumption of the memory hierarchy by replacing some of its parts by emerging fast and non-volatiles technologies (to reduce the leakage). ii) Rethinking the computing schemes to go beyond standard CMOS approach, by taking advantage of emerging non-volatile devices to intrinsically mix memory and logic. iii) Using emerging non-volatile devices to implement very efficient neuromorphic accelerators for specific tasks usually performed by GPUs. Among these emerging technologies, spintronics offers high speed, non volatility and endurance, but the energy cost of magnetization switching remains high. The SPINTEC laboratory discovered in 2020-2021 that it is possible to control spin currents using ferroelectricity rather than ferromagnetism, which leads to a huge reduction of the writing power consumption. The aim of this project is to explore novel functionalities offered by this new technology, from a design integration perspective. Using our understanding of the spin transport in these devices and our expertise about design of hybrid circuits embedding emerging devices, we will investigate the benefits of its use in memory, logic and neuromorphic computing for ultra-low power and energy efficient systems.