SECure Reconfigurable processor using Emerging Technologies – SECRET

Design : Before design a full computing system comprising emerging technologies and regular processor, NV-operators will be designed with emerging non-volatile technologies. We will start from transistor level simulation and scale them to processor size using FPGA based hardware emulation.

Integrate : The NV-operators created during the project will be integrate to complete computing system. Firstly, we will use the hardware emulation platform we are developing to identify which NV-operators are the most interesting. Then, they will be integrated in an ASIC demonstrator to fulfill SECRET final objectives.

Evaluate : Security features will be implemented using the NV-operator for critical sub-function(s) and evaluated thanks to classical and innovative attacks. In addition, the global energy consumption of the whole system will also be evaluated and compared to the state of the art of IoT security solutions.

The project expect to reduce the energy consumption of the security port in a sensor node and an improvement of the security level of the sensor node.

The reconfigurability property researched by SECRET will allow to change the cryptographic protocol along with the security standard. This will makes it possible to decrease the environmental impact of the Internet of thing.

SECRET target high level international conferences and journals.

Patent will also be considered for outstanding non-volatile operators.

The Internet of Things (IoT) is today a well-known ecosystem, continuously growing at an impressive speed (5x more objects are expected to be connected in the next few years), where small and smart objects interact through communicating networks. Consequently, the amount of collected and transmitted data is becoming enormous (estimated to reach 40 zettabytes in 2020). Depending on the application, the data may be sensitive and need to be protected using security features such as cryptography, authentication protocol and so on. Concerning these security aspects, the majority of scientific articles only present risks and challenges through surveys or focus on secure network protocols for IoT. Consequently, security features are classically added to the main computing or communication unit, which are the most energy consuming part of sensor nodes. Another solution is to add security features externally using either hardware accelerators or hardware secure elements. However, these solutions require important area and energy consumption overhead. However, it is mandatory to keep the energy consumption low in the IoT context. Concerning this aspect, one interesting direction is to process data as close as possible to the sensor. The trend in this “Near sensor computing” concept is to reduce the amount of data sent over the wireless network, reducing the number of operations executed by the main computing unit. In parallel to this, emerging non-volatile memories (such as Ox-Ram or Fe-Ram) are used to introduce normally-off computing in sensor nodes. This allows the sensor node to be freeze most of the time and active only when needed thanks to activation signal and devices.
In this context, the SECRET project aims to act on security and energy aspect at the same time. SECRET will introduce the concept of near-sensor cryptography by creating a new reconfigurable and non-volatile operator inside the instruction flow of low power processor. The idea is to bring security features as close as possible to the sensor (i.e. in the pre-processing unit) in order to reduce the vulnerable area and reduce the total power consumption of sensor nodes. The originality of the SECRET project is to use emerging non-volatile memory technologies directly inside the execution flow of a processing unit in order to propose an energy efficient and robust implementation of cryptographic algorithms for IoT. This concept will show a gain on security and energy consumption. Indeed, the use of a non-volatile operator close to the sensor will reduce the vulnerable space of the sensor node but it will also reduce the number of memory call needed to execute cryptographic algorithm. On one hand, the robustness against side channel timing cache attacks will increase. On the other hand, less energy will be consumed because of less memory call and low-power logic in memory operation.
The ultimate objective of the SECRET project is to design and fabricate an ASIC containing a complete processor including a new non-volatile, reconfigurable and low power operator inside its execution flow. The demonstrator application will be dedicated to security in order to prove that this new type of operator can enhance security in IoT wireless sensor nodes by bringing the security as close as possible to the sensor and enabling protection for all components in sensor nodes. In addition, this will avoid the classical security scheme which use of external hardware accelerator. The full evaluation of the demonstrator will show all benefit of the SECRET approach related to standard IoT security scheme in terms of robustness against classical hardware attacks as well as in term of energy consumption of security features.