Hardware is often considered as an abstract layer that behaves correctly, executing instructions and giving an output. However, side effects due to software implementation and its execution on actual hardware can cause information leakage from side channels, resulting in critical vulnerabilities impacting both the security and privacy of these systems
The MIAOUS project targets in particular information leakage that does not require any physical proximity to devices and that is due to processor microarchitecture, as well as the constructions of novel countermeasures.
The main goal of this project is to propose a generic framework to provide a better understanding of the attack surface for microarchitectural attacks, both on the hardware and on the software side, and the tools to close the attack surface.
Madame Clémentine MAURICE (Institut de Recherche en Informatique et Systèmes Aléatoires)
The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.
IRISA Institut de Recherche en Informatique et Systèmes Aléatoires
Graz University of Technology / IAIK
Help of the ANR 252,860 euros
Beginning and duration of the scientific project: September 2019 - 48 Months