Development of innovativE GaN-on-Silicon power swiTch for next generation of high efficIeNcy powEr Electronics – DESTINEE
Next generation of GaN power devices
Development of innovativE GaN-on-Silicon power swiTch for next generation of high efficIeNcy powEr Electronics
Towards higher voltage operation for GaN-based transistors
Gallium Nitride (GaN) devices are foreseen to play a major role in next generation of power electronic applications. This is due to its outstanding material properties and cost-effective manufacturing when grown on silicon substrate. The new technology would enable higher efficiency and less complexity as well as being light-weight with greater functionality, robustness and the ability to operate in a wide ambient temperature range. Similarly, GaN-based power conversion circuits can operate at higher efficiencies and high frequencies enabling compact converter and inverter designs, up to a 10? reduction in size, cost and weight. <br />In this frame, we have developed a new concept enabling to boost significantly the GaN-on-silicon device breakdown voltage above 3000 V. The key feature of this concept lies in a backside local removal of the silicon substrate around the drain electrode. One of the main challenges of power devices is the thermal management. This project aims at developing an innovative thermal management solution integrated within the backside trenches, which should generate unique substrate grounded GaN power devices operating at voltages far beyond existing GaN-based devices.
The project DESTINEE is divided in 4 Work-packages. The objectives of WP1 is the growth of GaN-based epilayers on silicon substrate for which various heterostructures have been grown and characterized prior to delivery to IEMN. An industrial epi-source has also been used in this project. WP2 focuses on the fabrication and basic electrical characterization of devices. A specific mask-set has been developed in order to evaluate the various structures coming from the WP1 as well as the optimization of the backside local substrate removal (LSR) concept on small lab-devices. Another mask-set has been developed for the demonstration of the LSR approach on large transistors. WP3 concerns the development and optimization of thick AlN films (> 8 µm) delivering a high breakdown strength > 3 MV/cm required to replace the silicon substrate after the LSR. Finally, WP4 includes the simulation and modelling of the fabricated devices in order to support the transistor design. It also includes the advanced characterizations such as the thermal and dynamic measurements.
A state-of-the-art vertical breakdown beyond 1.3 kV has been observed on a 5 µm thick buffer using a carbon doping combined with AlN/GaN super-lattices (2.6 MV/cm) from the company SOITEC-Belgium, compared to 1 kV with a 5.5 µm buffer using the more standard graded AlGaN. Substrate ramp measurements up to 150°C revealed for the first time a significant reduction of trapping effects up to 1.2 kV. These results pave the way to GaN-on-Si lateral power transistors operating at 1200 V with a low on-resistance et low electron trapping. This study contributed to the development of a product available from SOITEC-Belgium.
From targeted specifications point of view, the objectives of DESTINEE have been successfully reached. Indeed, we have demonstrated a proof of concept of the local substrate removal as well as a substantial improvement of the blocking voltage in industrial transistors from the company OnSemiconductor with a reasonable thermal degradation owing to the backside metallization. The results show the possibility to achieve transistors delivering more than 10A with a blocking voltage above 2 kV.
From targeted specifications point of view, the objectives of DESTINEE have been successfully reached. Indeed, we have demonstrated a proof of concept of the local substrate removal as well as a substantial improvement of the blocking voltage in industrial transistors from the company OnSemiconductor with a reasonable thermal degradation owing to the backside metallization. The results show the possibility to achieve transistors delivering more than 10A with a blocking voltage above 2 kV.
The project DESTINEE enabled to generate 6 papers published in international journals with high impact factor, 15 international conferences including 7 invited talks as well as 2 press releases published in the magazine Compound Semiconductor and the website from the company KymaTech.
Gallium Nitride (GaN) devices are foreseen to play a major role in next generation of power electronic applications. This is due to its outstanding material properties and cost-effective manufacturing when grown on silicon substrate. Thus, GaN-based power switches have the potential to enable high efficiency connection of renewable energy sources to the electricity grid. The new technology would enable higher efficiency and less complexity as well as being light-weight with greater functionality, robustness and the ability to operate in a wide ambient temperature range. The ultimate goal for renewable energy companies is to supply/interface their energy to the national grid with minimal loss. This will ultimately mean there will be less demand for energy derived from fossil-fuel sources, and so this way will protect the environment from CO2 emissions. GaN devices are expected to reliably operate at elevated junction temperatures up to at least 225°C (presently used Si-based devices cease to function at ~150°C), easing the constraints on current cooling requirements. Similarly, GaN-based power conversion circuits can operate at higher efficiencies and high frequencies enabling compact converter and inverter designs, up to a 10? reduction in size, cost and weight. This will translate into significant energy saving (~10%), overall cost reduction, increased adoption of renewable energy sources, and improvements in profit for the renewable energy companies.
In this frame, we have developed a new concept enabling to boost significantly the GaN-on-silicon device breakdown voltage above 3000 V. The key feature of this concept lies in a backside local removal of the silicon substrate around the drain electrode. One of the main challenges of power devices is the thermal management. This project aims at developing an innovative thermal management solution integrated within the backside trenches, which should generate unique substrate grounded GaN power devices operating at voltages far beyond existing GaN-based devices. Four public institutions IEMN, ESIEE, CRHEA and LAAS will combine their skills to reach this ambitious goal that would lead to a real technological breakthrough for power applications. The DESTINEE research effort addresses key critical components based on the emerging GaN material for next generation of power electronics. It will benefit from existing collaborations with partners that have leadership in their respective domain. The project covers a large added value chain from epitaxy, integrated device technology developments, to prototype device characterisation and preliminary reliability.
Project coordination
Farid Medjdoub (Institut d'Electronique, de Microélectronique, de Nanotechnologie)
The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.
Partner
IEMN - CNRS Institut d'Electronique, de Microélectronique, de Nanotechnologie
CRHEA Centre de Recherche sur l'Hétéro-Epitaxie et ses Applications
ESIEE paris Chambre de commerce et d'industrie régionale de Paris île-de-France ESIEE Paris
CNRS/LAAS Centre National de la Recherche Scientifique/LAAS
Help of the ANR 458,972 euros
Beginning and duration of the scientific project:
December 2016
- 42 Months