Fast Acquisition Lattice Camera Owing to Nanotechnology – FALCON

The systems is composed of 3 tiers which integrates the 3 mains microelectronic part of the sensor. The first ones is for the active pixel, the second one is for the analogic to digital conversion part, the last is for the high density digital memory. The massively parallel approaches offered by the 3D assembly make it possible to reach the targeted performances. The final 3D demonstrator is too expensive to be realized in the framework of this project, thus a small size monolithic/hybride sensor will be realized in order to validate each sub-part of the project while taking into account the spatial constraints due to the final 3D design. A model of the sensor based of the characteristic of the demonstrator will be used to validate the feasibility and to predict the behavior of the final 3D sensor.

At this moment, the project is still in the design phase. The simulations show that the demonstrator should match the initial specification. Indeed, the pixel, ADC, memory and driving parts should reach the targeted performances while matching the final 3D architecture of the sensor. Moreover, an electro thermal analysis and simulation of the sensor carried out by a dedicated simulator realized by the consortium validates the feasibility of the different acquisition scenarios.

The chip will be send in foundry in September 2016. The characterization and the test phases will follow. The demonstrator will be probably used by the XFEL groupe facilities for X-ray flash analysis.

Some simulations of original concepts of high speed imaging sensor driving techniques have already be published in two international conferences and one international review.
ACLI-1 O. Maciu, W. Uhring, J-P. Le Normand, J-B. Kammerer, F. Dadouche, Edge-based technique for ultra-fast gating of large array imagers, SENSORCOMM 2015, Venise, Italy, pp 24-28, IARIA (Eds.), août 2015. ISBN: 978-1-61208-425-1; Selected Paper to IFSA publication
ACLI-2. O. Maciu, W. Uhring, J-B. Kammerer, J-P. Le Normand, N. Dumas, F. Dadouche, Sub-Nanosecond Gated Photon Counting for High Spatial Resolution CMOS Imagers, IEEE NEWCAS 2016, Vancouver, Canada.
RI-1 O. Maciu, W. Uhring, J-P. Le Normand, J-B. Kammerer, F. Dadouche, N. Dumas, Sub-nanosecond Gating of Large CMOS Imagers, Sensors & Transducers Journal, IFSA Publishing ( SJR : 0.114 ), pages 41-49, Vol. 193, n° 10, oct. 2015
The others original concepts within the pixel, as the binning methods, the architecture and consumption optimizations dedicated for the high speed imaging approaches will be experimentally validated and then patented/published.
The Falcon project has been presented at the following invited talk given in some international conferences:
-W. Uhring, Keynote: High Speed Video Sensors, SIGNAL 2016, Lisbonne, Portugal, IARIA (Eds.), 2016.
-W. Uhring, Moderator of the Panel on «Topic: Challenges in High Speed Image Processing«, IARIA SIGNAL 2016, Lisbonne, France, juin 2016.
-W. Uhring, High Speed Image Sensors, Image Sensor 2016, London, United Kingdom, Smithers Apex (Eds.), mars 2016
-W. Uhring, Keynote: High Speed Imaging, SENSORCOMM 2015, Venice, Italy, août 2015
-W. Uhring, Smart and Ultrafast CMOS Image Sensors - The Dream Come True with 3D Heterogeneous Microelectronic, Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015), Grenoble, France, co-located with Conference on Design, Automation and Test in Europe, mars 2015. Invited Talk; arxiv.org/html/1502.07241v2

High speed imaging is a booming activity with the ideal application of CMOS technology imagers. It makes it possible to acquire a fast single event at a fast sampling and frame rate and to observe it at a reduced frame rate. It finds many applications in motion analysis, explosives, ballistic, biomechanics research, crash test, airbag deployment, manufacturing, production line monitoring, deformation, droplet formation, fluid dynamics, particle, spray, shock & vibration, etc. High speed video imaging is currently driven by some industrial manufacturers such as Photron, Redlake, Drs Hadland, which design their own sensors. The current industrial most efficient imagers offer a speed of 22,000 frames per second (fps) for a spatial resolution of 1280x800 pixels, i.e. 22 Gpixel/s. This speed is not restricted by the electronics of the pixel but by the sensors chip inputs/outputs interconnections. The conventional operation mode based on extracting the sensor data at each acquisition of a new image is a real technological barrier that limits the scope of high speed cameras to the study of transient phenomena that last for a few hundred microseconds. The FALCON project's main goal is to overcome this technological barrier, increasing the acquisition speed by three orders of magnitude by proposing a sensor capable of taking up to 100 million fps while increasing the sampling rate up to 10 TeraPixel/s. To accomplish this, the classical approach of extracting image sensor should be abandoned in favor of a new one which makes it possible to eradicate the inputs/outputs bottleneck. Several studies mention the realization of high-speed image sensors based on the principle of "burst" imagers (BIS Burst Image Sensor). Since it is impossible to get the frames out of the sensor as they are acquired, the idea is to store all the images in the sensor and execute the readout afterward, after the end of the event to be recorded. So far, all the developed BIS based on this principle use a totally analog approach in the form of a monolithic sensor. The size of the embedded memory is generally limited to a hundred frames, the pixel pitch is around 50 µm and the acquisition rate is in the order of 10 Mfps for large 2D arrays. Furthermore, research works mention little data about the signal to noise ratio (SNR), but the leakage current of the storage capacities degrades the signal quality and the effect is more noticeable when the readout duration is high, i.e. when the number of stored images is large. This phenomenon limits, once again, the number of storable images in analog BIS forms. In general, a maximal SNR of 45 dB is obtained.
The FALCON project is based on a device concept in total disruption with previous works, by implementing the possibilities offered by the emergent microelectronics 3D technologies in order to increase the performance of this type of sensor while also adding more features to it. A PhD work started in 2012 in collaboration between the CEA Leti and the ICube laboratory helped to determine an optimal sensor architecture that takes advantage of the 3D technology. A particularity of the proposed architecture is the in-line analog to digital conversion at full speed. This study shows that the proposed new approach increases the number of stored images, while increasing the signal to noise ratio. It has also brought light to the potential problems of heat dissipation inherent to both fast circuits and 3D technologies. The methodological aspects of the design are also at the center of the project seeing that architecture/partitioning and electronic/thermal co-designs are necessary to carry out this type of conception. New tools and methods for the design of integrated heterogeneous systems are needed. The ultimate objective of the project is a high definition 1200x1200 pixels, 10 Mega fps with more than 1000 frames embedded digital memory. The project is pushing the performances of all the system bricks to the state of the art.