F3CAS: Rethinking FPGA-Accelerated Computer Architecture Simulation for Data Storage Exploration – F3CAS
Modern high-performance mobile computing architectures spend more than 60% of the energy on data storage and movement. However, fundamental limitations in existing evaluation tools hinder the road to innovation in memory systems. Accordingly, this project proposes a new paradigm to build user-Friendly, Fast and Faithful Computer-system Architecture Simulations (F3CAS) tailored to the exploration of new memory architectures. F3CAS uniquely combines FPGA-acceleration with tightly coupled domain-specific soft-processors to encapsulate the simulator in a software-like abstraction. The F3CAS simulation will be demonstrated in the evaluation of emerging Non-Volatile Memory (NVM) technologies, such as the Spin-Transfer Torque (STT) RAM.
Project coordination
David Novo (Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier)
The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.
Partner
LIRMM Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Help of the ANR 230,170 euros
Beginning and duration of the scientific project:
September 2021
- 48 Months
