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Wireless System And SystemC-AMS Basic Infrastructure – WASABI
Today, System-on-chip (SoC) and System-in-package (SiP) become more and more complex and include not only digital blocks but also analogue parts, radio frequency (RF) communication capabilities as wel
Extraction et Fusion d'Informations pour la mesure de Déplacement par Imagerie Radar – EFIDIR
The SAR (Synthetic Aperture Radar) data acquired today by remote sensing satellites require a particularly large storage capacity: 1 Gigabyte for a couple of ERS scenes (100 km by 100 km), more than
Universal channel Decoder – UDEC
The UDEC project aims at defining and developing an efficient and high performance universal channel decoder architecture model for emerging and future digital communication systems. In order to addre
Architectures FPGA hiérarchiques sécurisées pour les systèmes sur puce – SEFPGA
The economical constraints linked to the cost and market adaptation impose the integration of processor cores in the VLSI circuits. The flexibility that the System on a Chip "SoC" provides, suffers f
Framework for Embedded Image Applications – FREIA
The sea of transistors available on one chip opens the door to many new image and video processing applications for the security and the transportation industries, with different trade-offs between ra
Mechanism of protein biosynthesis on ribosome studied by X-Ray analysis. – SSOR
1-Scientific background and objectives : The ribosome is a giant ribonucleoprotein cellular assembly (M.w. about 2 500 000 da) that translates genetic code into protein in living cells, and consists o
conSistent EStimation and lArge random MatricEs – SESAME
The project addresses estimation problems in the fields of signal processing and wireless communications. We consider the frequent case where the observed signal yn corresponds to a multivariate time
