Monolithic Ultimate power Switching cell in SIlicon Carbide – MUSIC

Power microelectronics associated with high-efficiency electrical conversion systems are essential to reduce the energy consumption. Nevertheless, power microelectronics and electrical conversion circuits are still considered as disjointed disciplines during the design process. This results in very heterogeneous hybrid integration in which, on the one hand, a large number of dipole semiconductor chips and, on the other hand, an increasingly complex electrical circuit.

To create a design leap, we have found that the integration perimeter of the power switching cell, basic brick, didn’t evolve and constitutes the major challenge that has to be overcome in order to shift towards a new paradigm that would give us the opportunity to project ourselves into levels of integration and performance that mark a sharp break with the classical hybrid integration approaches.

The scientific ambition of our project, including Ampère, L2n, Laas and Laplace labs, is to demonstrate the relevance of a new design perimeter for power switching cells through a monolithic vertical integration approach on a multi-terminal power chip with Wide-Band Gap material such as 4H silicon carbide (SiC).

This proposed ultimate integration assumes the ability to co-integrate the switches within a single chip or on a few number of chips. This constraint implies mutualizing as many crystalline regions as possible within the volume and metal layers on the surface. Consequently, the chip has to sustain voltage both vertically and laterally. This major feature clearly represents the scientific and technological challenge that we want to take up by a double and original vision combining new innovative component architectures and new specific technological processes.

If this challenge is about to be overcome in silicon technology, it is not the case in silicon carbide technology because this type of carbonaceous substrate is of great mechanical hardness and makes it difficult to realize isolated deep trenches in thick SiC substrate that must be filled with an insulator. In addition, in the high gap energy of silicon carbide it is difficult to diffuse the doping impurities and also complex to carry out localized or buried P+ type ionic implantation. This does not allow the realization of bipolar components such as IGBT or PIN diode as easily as in silicon. As a consequence, a reconsideration of architectures making use quasi-only of vertical unipolar switch diode architecture within the context of a full integration of switching cells on SiC chips is therefore mandatory to circumvent these difficulties.

Conceptually, the main challenge that will be overcome by this project is the vertical co-integration on a SiC substrate of at least two specified 1.2kV-25A switches in a multi-terminal single chip configuration, which will be studied in T1 by physical simulation and modelling, including in T2 new and innovative technological steps, then evaluated experimentally in T3.

Three prototypes are targeted as project milestones: A) first basic integration of JBS Diode/JBS Diode 3-terminal SiC single chip using new vertical isolated deep trenches, B) application for integration of VDMOSFET/VDMOSFET 3-terminal SiC single chip in two variants, C) extended integration for VDMOSFET/JBS Diode 3-terminal SiC single chip, in two variants, using new vertical isolated deep trenches, and innovative embedded metallic vias. All chips will be laterally isolated by deep trenches using either plasma etching technique or photo-electrochemical process that will be developed and processed thus creating an elementary and generic switching cell or half-cell.

Innovative steps will be designed to be compatible with industrial capability SiC VDMOS process flow / production chain to facilitate their valorization. Future 3-terminal chips, will be the basic functions of future conversion systems with very high integration and high energy efficiency requirements.