ANR-DFG - Appel à projets générique 2020 - DFG

Heuristics for Heterogeneous Memory – H2M

Submission summary

High-performance computing (HPC) is crucial to advance computational science and engineering. In all modern computing systems, the performance gap between compute and memory continues to spread, particularly in the face of multi-core and accelerated systems. In consequence, the memory
subsystem is changing: the evolution of the cache hierarchy is followed by new technologies with new kinds of memory. In the context of HPC, this has been pioneered by combining traditional main memory with a small fraction of high-bandwidth memory. In systems with accelerators, like GPUs, the
heterogeneity by means of different kinds of memory is already higher. Currently, applications have to be heavily modified for specific target platforms, and have to employ vendor-specific APIs to exploit heterogeneous memory.

There is a critical need to develop a portable, vendor-neutral view of heterogeneous memory to enable a productive use in scientific or technical applications. This has to come in the form of a hierarchy of abstractions to cope with the variety of existing hardware, to enable the use of runtime heuristics to select from the kinds of memory available at runtime. At the moment it is unclear how these abstractions and heuristics should look like and several fundamental questions have to be answered.

H2M’s research results will define a concrete development roadmap for parallel programming systems. The project will develop a hierarchy of programming abstractions to expose heterogeneous memory at different levels of detail and control, complemented by a set of required, vendor-neutral capabilities to be provided by standards and intelligent runtime systems.

Intelligent runtime systems have to employ various strategies based on these abstractions to place data. H2M will develop runtime heuristics to exploit heterogeneous memory for dynamic, abstract data structures. A memory performance model will help to decide when to bind threads first and place data later, and when to place data first and bind threads accordingly. This will be implemented in heuristics to select a suitable kind of memory based on application needs. Furthermore, H2M will define deciding factors if and when to move allocated application data from one kind or bank of memory to another. Both decisions will be made considering the trade-off between performance and capacity.

Based on the performance research, at the end of the project H2M will develop concrete proposals to serve as the base for proposals to standardization committees.

H2M combines the Inria team’s expertise in exposing low-level runtime functionality and the RWTH’s group ability to leverage these to develop abstractions for HPC programming. The result of this joint work will be a deep understanding of how heterogeneous memory systems have to be programmed, a hierarchy of programming abstractions and a set of heuristics for use in intelligent runtime systems to serve applications optimized for performance and scalability.

Project coordination

Brice GOGLIN (Centre de Recherche Inria Bordeaux - Sud-Ouest)

The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.


INRIA Centre de Recherche Inria Bordeaux - Sud-Ouest
RWTH Aachen University

Help of the ANR 180,360 euros
Beginning and duration of the scientific project: December 2020 - 36 Months

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