Optical metrology for through silicon vias – OLOVIA

3D integration is a major and durable integration technology developed since the beginning of 21st century by all major semiconductor companies and several large research institutes for electronic, imaging and sensing miniaturized systems. It is based on the stacking and bonding of thinned silicon wafers/chips with electrical vias (vertical interconnect access) for die to die interconnections. This enables to benefit from a global size reduction, from a broad range of new functionalities offered by heterogeneous integration, and from new packaging capabilities with a high contact density. It will also reduce issues related to 2D integration and devices downscaling below the 14 nm node. One of the key technologies for 3D IC, 2,5D (with interposer) and 3D packaging integration processes is the fabrication of high aspect ratio vertical interconnections by Through Silicon Vias (TSV). This technology generates new challenging metrology needs that must be solved.
The SME FOGALE nanotech is one the industrial leaders for the metrology of 3D integration processes and TSV, and many major semiconductor companies and foundries worldwide use or are acquiring their metrology solutions. Those solutions comply with current requirements but must be secured, improved and extended for future metrology needs predicted by the International Technology Roadmap for Semiconductors (ITRS). The OLOVIA project combines the expertise of FOGALE nanotech, IEF and IOGS in optical instrumentation, interferometry techniques and optical modelling to tackle this challenge.
Thus, the general objective of OLOVIA project will be to introduce non destructive, quantitative, accurate, reliable and high throughput optical tools able to satisfy challenging metrology needs for in line control of TSV industrial fabrication processes. Those optical tools will address two main issues of TSV metrology: i) the measurement of etched via geometrical parameters (depth, top and bottom diameters, shape, sidewall roughness, remaining silicon thickness), and ii) the mapping of mechanical stress field generated around the vias at various stages of the fabrication process. Specifically,
i) Via geometry measurements will be based on the design and implementation of new measurement procedures/versions of low coherence interferometry and advanced microscopy techniques existing at FOGALE nanotech and IEF
ii) stress field measurements will rely on the development of a new full field microscopic photoelasticity system with fast phase modulation able to work both in the transmission and in the reflection modes.

Both optical systems will be designed to be compatible with industrial use. They will be based on advanced finite element simulations of the light-beam interactions at the nanoscale in and around a via at IOGS, on in depth performance analysis of optical systems and associated phase demodulation techniques at IEF and FOGALE nanotech, and on extensive tests on dedicated samples fabricated at IEF. In addition, a photoelastic constant calibration system will be built and comparative measurements with reference techniques (cross sectional SEM/TEM, Raman spectroscopy,...) will be performed to ascertain the performances of the developed optical systems. Finally, the optical systems will be qualified on industrial samples with various TSV technologies. Finally, other potential applications in the semiconductor field such as defect inspection of wafer bonding processes, as well as local stress measurements on MEMS and wafer-level packages will be explored.