RPDOC - Retour Post-Doctorants

Development and integration of nanoscale memristive devices for neuro-inspired computing systems – DINAMO


development and integartion of nanoscale memristive devices for neuro-inspired computing systems

toward neuromorphic computing systems

Processing information the same way than what can do the brain is a very attractive challenge. Indeed, it can lead to practical applications as visual recognition, database classification but it is also the opportunity to address a more fundamental question in computing theory.

The project is organized in two main directions that aim at studying the integration of memory devices for the realization of the synapses in neuromorphic computing systems: (i) the first aspect is based on the utilization of transition metal oxides memristive devices and (ii) the second one on a bottom-up approach for innovative integration solutions. The devices of this part are based on CB-RAM technology

OxRAM devices will be finalized soon and have required the development of all the technological step of the process at IEMN (ALD setup for TiO2 deposition and ebeam lithography optimization for 30nm devices). A collaboration with C. Dubourdieu and R. Bachelet from INL has been established for future material optimization. CBRAM devices have been realized and are currently under electrical test.

The next step of the project will focus on the self assembly process of metallic nanowires for the CBRAM technology interconnected into meshed arrays. OxRAM devices will be integrated into crossbar by optimization of Ebeam lithography (with a targeted size of 30 nm devices and 10x10 crossbar arrays)

no papers

The past several decades have been marked by the exponential growth of computer-generated data and related information processing. Such growth continues now, e.g. with the deployment of gigabit internet and 4G wireless networks, and will likely be accelerated by emerging technologies such as robotics, biotechnology, and distributed sensor networks. Given the inevitable end of scaling of conventional semiconductor circuits and increasing energy-use awareness, alternative ways to allow for information processing in an energy efficient fashion must be developed: Nanotechnologies open the way to new computing paradigms and circuits that could replace the actual technology based on Von Neumann architecture and CMOS devices.
The aim of this project is to develop hardware systems of memristive nanodevices for neuro-inspired computing. Different promising ideas have been proposed for alternative computing solutions based on bio-inspired computing paradigm, such as perceptron, associative memory or Bayesian inference. These propositions are particularly promising for classification, recognition or anticipation tasks, which are hardly implement in conventional computers. If theoretical works are already available for estimation of performances and functionalities demonstration, experimental realization of these computing systems represent a challenge with high impact potentiality. The recent proposition of memristance by D. Strukov based on RRAM technology offers a unique opportunity to bridge the gap between theory and experiment by providing simple two terminal nanodevices that could match the requirement in terms of memory density and parallel interconnect for such circuits.
I propose in this project an approach based on the development in parallel of (i) a specific technology for neuro-inspired computing - more precisely, the successful technology will implement the synaptic operation by coupling analog memory (or multistate resistance) and plasticity properties (i.e. tuning of memory volatility) – and (ii) the realization of hybrid circuits for neuro-inspired function demonstration and evaluation. These hybrid circuits will be built with hardware integrated nanodevices and Integrated Circuit breadboarding. This approach is directly compatible with hybrid CMOS/nanodevices circuit development that is envisioned for such neuro-inspired systems. If successful, such approach would allow orders of magnitude energy savings in information processing and enable more functional electronics.

Project coordinator

Monsieur Fabien Alibart (Institut d'Electronique Microélectronique et de Nanotechnologie) – fabien.alibart@iemn.univ-lille1.fr

The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.


IEMN-CNRS Institut d'Electronique Microélectronique et de Nanotechnologie

Help of the ANR 482,513 euros
Beginning and duration of the scientific project: December 2012 - 36 Months

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