BLANC - Blanc

A SofTwarE defined radio receiver based on a Configurable DSP And an RF SD ADC. – ASTECAS

Submission summary

In recent years, the number of wireless communication standards has been drastically increased to cover different needs. Internet has became available everywhere through WiFi (IEEE 802.11) capabilities, cables have been replaced by using the low-power wireless standard Bluetooth (IEEE 802.15.1) and, in a near future, our environment will be monitored through wireless sensors networks (WSN) by using ZigBee (based on IEEE 802.15.4). Integration of these communication standards in a unique mobile device, relevant in terms of cost and power consuption, leads to several problems for RF transceivers design. One is the low power consumption required for the transceiver to preserve autonomy and increase life-time of hardly recyclable components like batteries (measured in charge/discharge cycles). Another problem concerns the merging of RF, analog and digital parts, inside a single System on Chip (SoC). If fabricating such transceivers in a low-cost standard CMOS technology is suitable for digital integration, it is more difficult for RF and analog circuits design. Hence, the amount of signal processing done with digital circuits has increased leading to software defined-radio (SDR) transceivers where several standards use the same hardware digitally configured, therfore reducing the number of components. In this project, we intend to realize a multistandard receiver for the PHY layers of three wireless standards: ZigBee, Bluetooth and WiFi. We will implement an Sofware Design Radio receiver architecture in CMOS technology, with a RF Analog-to-Digital conversion allowing a signal demodulation based on configurable digital circuits (cASIC). In order to define and validate relevant specifications of different parts (RF, analog and digital configrable), we intend to use a uniform environment based on systemC/systemC-AMS simulators. As a result of this project, a multi-standard receiver (Blue Tooth, Zeegwill be available, allowing size and power consumption comparede to nowadays realizations.

Project coordination

The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.


Help of the ANR 0 euros
Beginning and duration of the scientific project: - 0 Months

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